The Designer's Guide to Low Jitter Oscillators

by Mcneill, John A.; Ricketts, David S.

ISBN13: 9780387765266

ISBN10: 0387765263

Format: Hardcover

Pub. Date: 2009-04-17

Publisher(s): Springer Verlag

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Summary

The Designer's Guide to Low Jitter Oscillators emphasizes jitter for time domain applications so that there is not a need to translate from frequency domain. This provides a more direct path to the results for designing in an application area where performance is specified in the time domain. The book includes classification of oscillator types and an exhaustive guide to existing research literature which allows designers to find appropriate publications for more detailed design guidance. It also includes classification of measurement techniques to help designers understand how the eventual performance of circuit design is verified. This book contains a CD-ROM with MATLAB examples of design optimization, system level behavioral simulation, and intuitive presentation of probability background. The Designer's Guide to Low Jitter Oscillators is a companion to The Designera??s Guide to High Purity Oscillators by Hegazi, Rael, and Abidi. This book is for practicing designers with BS or MS degrees and researchers working in fields where noise requirements are specified in the time domain.

Introduction to oscillator jitter	p. 1
Applications	p. 1
Clock recovery in serial data transmission	p. 1
Methods of clock and data recovery	p. 3
Other applications	p. 4
Summary	p. 5
Types of VCOs	p. 7
LC resonant	p. 7
Multivibrator	p. 8
Ring oscillator	p. 8
Motivation and goals of this book	p. 9
Chapter summary	p. 11
Classification of ring oscillators	p. 13
Type of signal in the ring	p. 13
Single-ended	p. 14
True differential	p. 16
Pseudo differential	p. 18
Regenerative switching	p. 21
Signal format summary	p. 21
Tuning method	p. 21
Number of stages	p. 22
Loading	p. 24
Drive strength	p. 27
Voltage	p. 28
A Note on linearity	p. 29
Summary	p. 29
Output format	p. 29
Single output	p. 31
Dual output (quadrature)	p. 33
Multiple output	p. 34
Summary	p. 34
Chapter summary	p. 34
Phase-Locked Loop System Concepts	p. 35
Phase and frequency concepts	p. 35
Phase and jitter concepts in PLL applications	p. 39
Response of PLL loop to input signal and VCO phase noise	p. 40
Summary	p. 43
Measuring phase	p. 43
Time Domain	p. 43
Time domain: two sample standard deviation	p. 44
Frequency Domain	p. 46
Summary	p. 49
Measures that will be related in this book	p. 49
Case (i): Frequency domain, VCO open loop	p. 50
Case (ii): Frequency domain, PLL closed loop	p. 52
Case (iii): Time domain, closed loop, transmit clock referenced	p. 54
Case (iv): Time domain, closed loop, self-referenced	p. 56
Case (v): Time domain, open loop, self referenced	p. 58
Chapter Summary	p. 59
Approximate loop transfer functions	p. 62
Power spectra relationships	p. 66
Overview of Noise Analysis Fundamentals	p. 69
Fundamentals of random signals-time domain	p. 69
Deterministic vs. stochastic signals	p. 69
Expectation value and time average	p. 71
Autocorrelation	p. 73
Variance	p. 79
Classes of random signals	p. 81
Fundamentals of random signals-frequency domain	p. 82
Fourier transform	p. 82
Power spectrum of random signals	p. 82
Circuit analysis with random voltages and currents	p. 84
Time domain	p. 84
Frequency domain	p. 86
Measurement of p.s.d	p. 88
Noise	p. 89
Types and classification of noise	p. 89
Representation of noise	p. 92
Noise in oscillators	p. 92
Time domain-jitter	p. 93
Frequency domain - phase noise	p. 94
Chapter summary	p. 96
Non-ergodic processes	p. 98
Exponentials with gaussian distributed exponents	p. 99
Fourier transform pairs	p. 100
Measurement Techniques	p. 101
Theoretical development	p. 101
Case (i): Frequency domain, VCO open loop	p. 101
Case (ii): Frequency domain, PLL closed loop	p. 102
Case (iii): Time domain, closed loop, transmit clock referenced	p. 102
Case (iv): Time domain, closed loop, self-referenced	p. 103
Case (v): Time domain, open loop, self-referenced	p. 103
Instrumentation	p. 106
Time domain measurement instruments	p. 106
Frequency domain instrumentation	p. 112
Instrumentation summary	p. 112
Experimental verification	p. 113
PLL with multivibrator VCO	p. 113
Ring VCO	p. 118
Discussion of results	p. 118
Chapter summary	p. 120
Analysis of jitter process	p. 121
Data acquisition techniques	p. 123
Analysis of jitter in ring oscillators	p. 129
Review of jitter analysis in different types of oscillators	p. 129
Harmonic oscillators	p. 129
Relaxation oscillators	p. 132
Ring oscillator	p. 136
Jitter model theoretical development	p. 137
Time domain approach: jitter in each oscillator period	p. 138
Special case I: independent delay errors give 1/f2 spectrum	p. 140
Special case II: correlated delay errors	p. 143
General case	p. 146
Development in terms of gate delays	p. 148
Methodology: applying model to circuit design	p. 150
Experimental verification	p. 151
Chapter summary	p. 155
Stationarity of two-sample variance	p. 156
Variance of clock period errors	p. 157
Sources of jitter in ring oscillators	p. 161
Introduction	p. 161
Classification of jitter sources	p. 161
Strategy	p. 164
Control Path: system-level sources of noise	p. 166
Load element noise	p. 167
Fully differential case	p. 167
Single ended case	p. 171
Comparison of differential, single-ended K expressions	p. 174
Switching element noise	p. 175
Fully differential case	p. 175
Single ended case	p. 189
Comparison with other jitter sources	p. 196
Variation in $$ with tuning	p. 196
Bias element noise	p. 199
Fully differential case: tail current noise	p. 199
Comparison with other jitter sources	p. 203
Summary of noise contributions	p. 204
Experimental Verification	p. 208
Simulation	p. 208
Hardware tests	p. 214
Comparison with jitter in harmonic oscillator	p. 220
Time domain approach	p. 220
Frequency domain approach	p. 221
Chapter summary	p. 223
Differential pair switching delay	p. 224
Time-domain (transient) noise source simulation	p. 227
Design methodology	p. 231
Implications for design and simulation	p. 231
Methodology Overview	p. 233
Step 1: refer design goal to asymptotic K	p. 233
Step 2: adjust asymptotic K to gate-level K	p. 234
Step 3: determine constraints on the design of the individual gate	p. 234
Step 4: design for ring center frequency	p. 235
General design techniques for low jitter	p. 237
Chapter summary	p. 237
Low jitter VCO design examples	p. 239
CMOS single-ended ring oscillator	p. 239
VCO topology	p. 239
Number of stages	p. 240
Oscillation frequency	p. 241
Frequency tuning	p. 242
Jitter minimization - long channel	p. 244
Jitter minimization - short channel	p. 245
Experimental results	p. 245
Bipolar differential ring oscillator	p. 247
VCO requirements	p. 247
Ring oscillator design	p. 249
Experimental results	p. 257
Chapter summary	p. 264
Index	p. 275
Table of Contents provided by Ingram. All Rights Reserved.

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The Designer's Guide to Low Jitter Oscillators

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